¡ Semiconductor
MSM7570-01
TIMING DIAGRAM
Transmit Side PCM/ADPCM Data Interface
BCLK
0
1
2
3
4
5
6
7
8
9
10
tXS
tSX
tWS
XSYNC
tXD1
tXD2
tXD3
PCMSO
MSB
LSB
tSDX
BCLK
0
1
2
3
4
5
6
7
8
9
10
tXS
tSX
XSYNC
tXD1
tXD2
tXD3
IS
MSB
LSB
tSDX
Receive Side PCM/ADPCM Data Interface
BCLK
0
1
2
3
4
5
6
7
8
9
10
tRS
tSR
tWS
RSYNC
IR
tDS tDH
MSB
LSB
BCLK
0
tRS
tS1R
2
3
4
5
6
7
8
9
10
RSYNC
tRD1
tRD2
tRD3
PCMRO
MSB
LSB
tSDR
Figure 4 PCM/ADPCM Data Interface
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