MC14503B データシートの表示（PDF） - ON Semiconductor
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MC14503B Datasheet PDF : 7 Pages
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MC14503B
SWITCHING CHARACTERISTICS (Note 6) (CL = 50 pF, TA = 25_C)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Output Rise Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH = (0.5 ns/pF) CL + 20 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH = (0.3 ns/pF) CL + 8.0 ns
tTLH = (0.2 ns/pF) CL + 8.0 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Output Fall Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTHL = (0.5 ns/pF) CL + 20 ns
tTHL = (0.3 ns/pF) CL + 8.0 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTHL = (0.2 ns/pF) CL + 8.0 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Turn−Off Delay Time, all Outputs
tPLH = (0.3 ns/pF) CL + 60 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH = (0.15 ns/pF) CL + 27 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH = (0.1 ns/pF) CL + 20 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Turn−On Delay Time, all Outputs
tPHL = (0.3 ns/pF) CL + 60 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL = (0.15 ns/pF) CL + 27 ns
tPHL = (0.1 ns/pF) CL + 20 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 3−State Propagation Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Output “1” to High Impedance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Output “0” to High Impedance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ High Impedance to “1” Level
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ High Impedance to “0” Level
Symbol
tTLH
tTHL
tPLH
tPHL
tPHZ
tPLZ
tPZH
tPZL
All Types
VDD
Typ
VCC (Note 7) Max
Unit
ns
5.0
45
90
10
23
45
15
18
35
ns
5.0
45
90
10
23
45
15
18
35
ns
5.0
75
150
10
35
70
15
25
50
ns
5.0
75
150
10
35
70
15
25
50
5.0
75
150
ns
10
40
80
15
35
70
5.0
80
160
ns
10
40
80
15
35
70
5.0
65
130
ns
10
25
50
15
20
40
5.0
100
200
ns
10
35
70
15
25
50
6. The formulas given are for the typical characteristics only at 25_C.
7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
DISABLE
INPUT
PULSE
GENERATOR
VDD
16
INPUT
VSS
OUTPUT
CL
20 ns
INPUT
tPLH
OUTPUT
tPLH
90%
90%
tTLH
20 ns
VDD
50%
10% VSS
tPHL
VOH
50%
10% VOL
tTHL
tPHL
Figure 1. Switching Time Test Circuit and Waveforms
(tTLH, tTHL, tPHL, and tPLH)
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