2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
WRITE PULSE
CONFIGURATION
REGISTER
D
Q
FF
CK
Q
D
Q
FF
CK
Q
OUTPUT
PORT
REGISTER
READ PULSE
DATA FROM
SHIFT REGISTER
WRITE POLARITY
PULSE
Figure 7. Simplified Schematic of I/O0
INPUT
PORT
REGISTER
D
Q
FF
CK
Q
D
Q
FF
CK
Q
POLARITY
INVERSION
REGISTER
OUTPUT PORT
REGISTER DATA
I/O0
ESD-PROTECTION DIODE
GND
INPUT PORT
REGISTER DATA
POLARITY
REGISTER DATA
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