LB11817
Block Diagram
Note that the values of the external components shown here are reference values and are not guaranteed to be appropriate
in a given application.
VCC
VCC
100 kΩ 0.1µF
0.1 µF
0.1 µF
0.1 µF
VCC
I+
I-
VR TC
25 mV
Timing adjustment
U+
Hall amplifier
U- U
V+
V- V
W+
W- W
ID VP D1 D2 B2 B1
Voltage boost circuit
1µF
VCC
RF
U
U
V
V
W
W
PG
HB
S/S
Hall bias
TSD
Chip select
Reference
voltage
FC
0.1µF
Control amplifier and
current limiter
SL
300/360 rpm selection
CLK
OSC
Divider
Speed discriminator
Vref
FG+
FG
pattern
FG- 3 kΩ
DO
FG
V/I
0.47 µF
amplifier
(× 250)
FGO
50 mV
GND
No. 6213-9/10