![](/html/Kodenshi/156417/page15.png)
KK82C55A
DATA FROM CPU
TO KK82C55AN
WR
OBF
INTR
tWOB
ACK
STB
IBF
PERIPHERAL BUS
tST
tSIB
tPS
tAOB
tAK
tAD
tKD
RD
DATA FROM
PERIPHERAL TO
KK82C55AN
tPH
tRIB
DATA FROM
KK82C55AN TO
PERIPHERAL
DATA FROM
KK82C55AN TO 8080
Figure 15. MODE 2 (Bidirectional)
NOTE:
Any sequence where WR occurs before ACK , and STB occurs before RD is permissible.
( INTR = IBF ∗ MASK ∗ STB ∗ RD + OBF ∗ MASK ∗ ACK ∗WR )
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