IS61C1024AL-12KI データシートの表示（PDF） - Integrated Silicon Solution

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IS61C1024AL-12KI

128K x 8 HIGH-SPEED CMOS STATIC RAM

Integrated Silicon Solution 

IS61C1024AL, IS64C1024AL

ISSI ®

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

Parameter

-12

-15

Min. Max.

Min. Max.

Unit

tRC

Read Cycle Time

12 —

15 —

ns

tAA

Address Access Time

— 12

— 15

ns

tOHA

Output Hold Time

3—

3—

ns

tACE1

CE1 Access Time

— 12

— 15

ns

tACE2

CE2 Access Time

— 12

— 15

ns

tDOE

OE Access Time

—6

—7

ns

tLZOE(2)

OE to Low-Z Output

0—

0—

ns

tHZOE(2)

OE to High-Z Output

06

06

ns

tLZCE1(2)

CE1 to Low-Z Output

2—

2—

ns

tLZCE2(2)

CE2 to Low-Z Output

2—

2—

ns

tHZCE(2)

CE1 or CE2 to High-Z Output

07

08

ns

tPU(3)

CE1 or CE2 to Power-Up

0—

0—

ns

tPD(3)

CE1 or CE2 to Power-Down

— 12

— 12

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse

levels of 0 to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See Figures 1 and 2

AC TEST LOADS

480 Ω

5V

480 Ω

5V

OUTPUT

OUTPUT

30 pF

Including

jig and

scope

255 Ω

5 pF

Including

jig and

scope

255 Ω

Figure 1

Figure 2

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

5

Rev. B

01/24/05

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