HN29V1G91T-30 データシートの表示（PDF） - Renesas Electronics

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HN29V1G91T-30

128M × 8-bit AG-AND Flash Memory

Renesas Electronics 

HN29V1G91T-30

Command Definition

Command Sets

1st. cycle

2nd. cycle

acceptable while Busy

Read

00h

30h

Multi Bank Read

00h

31h

Random Data output in a Page

05h

E0h

Read for copy back

00h

35h

Copy Back Program

85h

10h

Page Data output

06h

E0h

Multi Bank Copy Back Program

85h

11h

Data Recovery Read

06h

E0h

Data Recovery Program

85h

10h

Reset

FFh



Acceptable

Page Program

80h

10h

Acceptable*2

Random Data Input in a Page

85h



Acceptable*2

Multi Bank Page Program

80h

11h

Acceptable*2

Cache Program

80h

15h

Block Erase

60h

D0h

Multi Bank Block Erase

60h−60h

D0h

Read Status

70h



Acceptable

Read Error Status

72h



Acceptable

Read Multi Block Status

Read Multi Block Error Status*1

71h



73h, 74h, 75h, 76h 

Acceptable

Acceptable

Status mode Reset

7Fh



Page mode Erase Verify

60h

D2h

Block mode Erase Verify

60h

D3h

Read ID

90h



Device Recovery

00h

38h

Notes: 1. Read Multi Block Error Status

73h: Bank0 Error Status, 74h: Bank1 Error Status, 75h: Bank2 Error Status, 76h: Bank3 Error

Status

2. The input of the program data can be done only in Busy state of Erase operation.

Rev.4.00, Jun.20.2004, page 9 of 89

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