CS61884 データシートの表示（PDF） - Cirrus Logic

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CS61884

Octal T1/E1/J1 Line Interface Unit

Cirrus Logic 

CS61884

8. BUILDING INTEGRATED TIMING SYSTEMS (BITS) CLOCK MODE

This mode is used to enable one or more channels

as a stand-alone timing recovery unit used for

G.703 Clock Recovery.

In hardware mode, BITS Clock mode is selected by

pulling the MUX pin “HIGH”. This enables only

channel zero as a stand-alone timing recovery unit,

no other channel can be used as a timing recovery

unit.

In host mode, each channel can be setup as an inde-

pendent G.703 timing recovery unit, through the

Bits Clock Enable Register (1Eh) (See Section

14.31 on page 41), setting the desired bit to “1” en-

ables BITS Clock mode for that channel. The fol-

lowing diagrams show how the BITS clock

function operates.

RCLK

RTIP

CS61884

RPOS

One Receiver

RNEG

0 .1 µ F R1

R2

RECEIVE

LINE

RRING

T1 1:2

Figure 3. G.703 BITS Clock Mode in NRZ Mode

RCLK

RTIP

CS61884

RPOS

One Receiver

RNEG

0 .1 µ F R1

R2

RECEIVE

LINE

RRING

T1 1:2

Figure 4. G.703 BITS Clock Mode in RZ Mode

RCLK

RPOS

RNEG

TCLK

TPOS

TNEG

RTIP

CS61884

0.1 µF

R1

One Channel

R2

RECEIVE

LINE

REMOTE

LOOPBACK

RRING

TTIP

T1 1:2

TRANMIT

LINE

TRING

T1 1:2

Figure 5. G.703 BITS Clock Mode in Remote Loopback

DS485PP4

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