datasheetbank_Logo
データシート検索エンジンとフリーデータシート

CH9294(1995) データシートの表示(PDF) - Unspecified

部品番号
コンポーネント説明
一致するリスト
CH9294
(Rev.:1995)
ETC1
Unspecified ETC1
CH9294 Datasheet PDF : 1 Pages
1
CHRONTEL
CH9294
Dual Graphics Clock Generator
Features
• Generates 16 preset video clocks, 8 preset memory
clocks, and buffers the reference frequency output
• Built-in power supply conditioning circuitry
provides excellent jitter performance and eliminates
the need for an external VDD dropping resistor
• Requires only two external components: one
14.318 MHz crystal and one 0.1 µF decoupling
capacitor
• Supports VGA, Super-VGA, XGA™, and 8514
graphic standards
• Supports output frequencies up to 135 MHz
• Drop-in replacement for ICS2494 and AV9194
• CMOS technology in 20-pin PDIP and SOIC
• 5V or 3.3V supply. For specific details on the
3.3V version, please consult Chrontel.
XGA is a trademark of IBM
Description
CH9294 is a dual PLL clock generator designed for
high frequency graphics applications. It can also be
used in applications requiring multiple clocks, such as
PC motherboards, disk drives, CD-ROM systems, and
modems.
The CH9294 provides separate memory clock (MCLK)
and video clock (VCLK) outputs, and a 14.318 MHz
reference clock output. Other input frequencies can be
used to obtain different output frequencies. Internal
loop filter elements minimize external part count.
The STROBE pin should be tied high or left open if not
used. FSx pins are latched on the falling edge of
STROBE.
FS[3:0]
STROBE
XI
XO/FIN
MS[2:0]
Rev. 2.1, 8/25/95
LATCH
ROM
VDD
AVDD
OSC
VPLL
MPLL
ROM
GND
Figure 1: Block Diagram
AGND
VCLK
XOUT
MCLK

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]