82559ER データシートの表示（PDF） - Intel
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82559ER Datasheet PDF : 94 Pages
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Networking Silicon — GD82559ER
10.4
10.4.1
10.4.1.1
Timing Specifications
Clocks Specifications
PCI Clock Specifications
The 82559ER uses the PCI Clock signal directly. Figure 26 shows the clock waveform and required
measurement points for the PCI Clock signal. Table 22 summarizes the PCI Clock specifications.
0.475VCC
0.4VCC
0.325V CC
0.6VCC
T_high
T_cyc
0.2VCC
T_low
0.4VCC p-to-p
(minimum)
Figure 26. PCI Clock Waveform
10.4.1.2
Table 22. PCI Clock Specifications
Symbol
T1 Tcyc
T2 Thigh
T3 Tlow
T4 Tslew
Parameter
CLK Cycle Time
CLK High Time
CLK Low Time
CLK Slew Rate
Min
Max
Units Notes
30
ns
1
11
ns
11
ns
1
4
V/ns
2
NOTES:
1. The 82559ER will work with any PCI clock frequency up to 33 MHz.
2. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate is met across the
minimum peak-to-peak portion of the clock waveform as shown in Figure 26.
X1 Specifications
X1 serves as a signal input from an external crystal or oscillator. Table 23 defines the 82559ER
requirements from this signal.
Table 23. X1 Clock Specifications
Symbol
T8 Tx1_dc
T9 Tx1_pr
Parameter
X1 Duty Cycle
X1 Period
Min
40%
Typical
40
Max
60%
Units Notes
ns
±50PPM
Datasheet
77
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