SSD1730QL3 データシートの表示（PDF） - Solomon Systech

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SSD1730QL3

SSD1730 MLA Power Chip CMOS

Solomon Systech  

4. BLOCK DIAGRAM

VDD_PWR

VSS

L0

L1

L2

L3

FR

XFR

LCD Polarity

Reverse Signal

Generator

LP

XSLP

Clock Signal

Generator

-V1 Discharge Circuit

Column (Segment)

Driver Voltage Gener-

ator

Row (Common) Driver

Voltage Generator

Row Driver Voltage

Conversion Circuit

VDD_ROW Voltage Generator

+V1 Voltage Generator

Figure 1 - Block Diagram

C1P

C1N

C2P

C2N

-V3

C3P

C3N

V2

C4P

C4N

-V2

C1PB

C1NB

-V3B

HC

C5P

C5N

VEM

C6N

VEE

C8N

VDD_ROW

C7N

-V1

AB

XBB

SOLOMON

2

Rev 2.0

SSD1730

04/2002

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