FS6159-01 データシートの表示（PDF） - AMI Semiconductor
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FS6159-01 Datasheet PDF : 15 Pages
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FS6159-01
Auxiliary Motherboard Clock Generator/Buffer IC
Table 17: AC Timing Specifications
Unless otherwise stated, all power supplies = 3.3V, no load on any output, and ambient temperature TA = 25°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and
are not currently production tested to any specific limits. MIN and MAX characterization data are ± 3σ from typical. Spread spectrum modulation is disabled except for Rise/Fall time measurements.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP. MAX. UNITS
Overall
Clock Offset
tpd
CK66 leads @ 1.5V, CL=30pF to PCI @ 1.5V,
CL = 30pF (measured on rising edges)
Propagation Delay
Rising edge on 66REF to rising edge on CK66
Rising edge on 66REF to rising edge on PCI
Tristate Enable Delay *
tDZL, tDZH SEL_Q = 0, SEL_R = 0, SEL_S = 0
1.0
Tristate Disable Delay *
tDLZ, tDHZ SEL_Q = 1, SEL_R = 0, SEL_S = 0
1.0
Clock Stabilization (on power-up) *
tSTB
via PWR_DWN#
REF_0:1 Clock Outputs
Duty Cycle *
dt
Ratio of high pulse width to one clock period,
measured at 1.5V
45
Jitter, Period (peak-peak) *
Rise Time *
Fall Time *
tj(∆P)
From rising edge to rising edge at 1.5V, CL = 20pF
tr min
Measured at 0.4V – 2.4V; CL = 10pF
1.0
tr max
Measured at 0.4V – 2.4V; CL = 20pF
tf min
Measured at 2.4V – 0.4V; CL = 10pF
1.0
tf max
Measured at 2.4V – 0.4V; CL = 20pF
CK48_0:1 Clock Outputs
Duty Cycle *
dt
Ratio of high pulse width to one clock period,
measured at 1.5V
45
Jitter, Period (peak-peak) *
Rise Time *
Fall Time *
tj(∆P)
From rising edge to rising edge at 1.5V, CL = 20pF
tr min
Measured at 0.4V – 2.4V; CL = 10pF
1.0
tr max
Measured at 0.4V – 2.4V; CL = 20pF
tf min
Measured at 2.4V – 0.4V; CL = 10pF
1.0
tf max
Measured at 2.4V – 0.4V; CL = 20pF
2.4
ns
6.8
ns
9.2
10
ns
10
ns
3.0
ms
55
%
1000
ps
ns
4.0
ns
4.0
55
%
350
ps
ns
4.0
ns
4.0
ISO9001
2.27.02
9
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