W83195R-08
8.3.5 Register 4: Reserved Register (1 = enable, 0 = Stopped)
Bit @PowerUp Pin
7
X
- Latched FS0#
6
1
- Reserved
5
1
- Reserved
4
1
- Reserved
3
x
- Latched FS1#
2
1
- Reserved
1
x
- Latched FS3#
0
1
- Reserved
Description
PRELIMINARY
8.3.6 Register 5: Peripheral Control (1 = enable, 0 = Stopped)
Bit @PowerUp Pin
Description
7
1
- Reserved
6
X
- Latched FS2#
5
1
- Reserved
4
1
54 IOAPIC _F(Active / Inactive)
3
1
55 IOAPIC0 (Active / Inactive)
2
1
- Reserved
1
1
2 REF1 (Active / Inactive)
0
1
3 REF0 (Active / Inactive)
Publication Release Date: Mar. 1999
-9-
Revision 0.30