EK7308 データシートの表示（PDF） - Unspecified

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EK7308

240- Output TFT Gate Driver IC

Unspecified 

EUREKA

4. PIN FUNCTION DESCRIPTIONS

Table 1. Pad description

EK7308

Pad Name I/O

Function

X1-X240

O

TFT gate driver

output

DESCRIPTION

Under the control of the shift register data, OE1 or OE2 or OE3, and

DIO1 or DIO2, the driver outputs are VGG or VEE and change their

value at the rising edge of FX

PATH

-

-

Short internally

X0, X241

VEE

VSS

RL

DIO1

DIO2

XDON

FX

OE1

OE2

OE3

VDD

VGG

-

-

- Supply

LCD panel auxiliary pins. This pins output VEE level.

Negative power supply for Level shifters. Chip ground

- Supply

Logic ground, Reference of the voltages

I

Shift direction

selection signal

RL = “H” : X1 to X240 (Shift left)

RL = “L” : X240 to X1 (Shift right)

I/O

Start pulse input

and output

I

Negative active

input pin

DIO1

DIO2

RL = “H”

RL = “L”

Input

Output

Output

Input

When XDON = “L” then the driver outputs are at the VGG level

independence of any other input or register value.

I

Shift register clock The start pulse is sampled at the rising edge of FX,

input

The carry pulse changes at the falling edge of FX.

I

Negative active

input pin

When OEN = “H” then the associated outputs are set to VEE

independent of the register data. This function is not synchronized

with FX.

- Supply

Logic positive power

- Supply

High voltage power and TFT driver output high level

June 2003

 

-3-

Preliminary Rev 0.1

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