ADIS16209(Rev0) データシートの表示（PDF） - Analog Devices

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ADIS16209
(Rev.:Rev0)

High-Accuracy, Dual-Axis Digital Inclinometer and Accelerometer

Analog Devices 

ADIS16209

BASIC OPERATION

The ADIS16209 requires only power/ground and SPI connec-

tions. The SPI is simple to hook up and is supported by many

common digital hardware platforms. Figure 20 provides a

simple hook-up diagram, while Table 2, Figure 2, and Figure 3

provide timing and bit assignments. Figure 4 provides the bit

sequence for accessing the register memory structure. Each

function within the ADIS16209 has its own 16-bit, 2-byte reg-

ister. Each byte has its own unique, 6-bit address. Note that

all 16 SCLK cycles are required for the DIN bit sequence to

configure the output for the next data frame. The ADIS16209

supports full duplex mode operation. Table 6 provides the

entire user register map for the ADIS16209. For each register,

the lower bytes address is given. For those registers that have

two bytes, the upper bytes address is simply the lower bytes

address, incremented by 0x01.

ADIS16209

CS

SCLK

DIN

DOUT

EMBEDDED

PROCESSOR/

DSP/FPGA

PF

SCK

MOSI

MISO

Figure 20. Typical SPI Hook-up

Many of the configuration registers have also been assigned

mirror locations in the flash memory, which effectively provides

them with a backup storage function. To assure the backup of

these registers, the COMMAND register provides an initiation

bit for manual flash updates. The ENDURANCE register

provides a running count of these events.

Table 6. User Register Map

Name

R/W Flash Backup

ENDURANCE R

Yes

SUPPLY_OUT R

No

XACCL_OUT R

No

YACCL_OUT R

No

AUX_ADC

R

No

TEMP_OUT R

No

XINCL_OUT R

No

YINCL_OUT R

No

ROT_OUT

R

No

XACCL_NULL R/W Yes

YACCL_NULL R/W Yes

XINCL_NULL R/W Yes

YINCL_NULL R/W Yes

ROT_NULL

R/W Yes

ALM_MAG1

ALM_MAG2

ALM_SMPL1

ALM_SMPL2

ALM_CTRL

AUX_DAC

GPIO_CTRL

MSC_CTRL

SMPL_PRD

AVG_CNT

SLP_CNT

STATUS

COMMAND

R/W Yes

R/W Yes

R/W Yes

R/W Yes

R/W Yes

No

R/W No

R/W No

R/W No

R/W Yes

R/W Yes

W Yes

R

No

W No

Address

0x00

0x02

0x04

0x06

0x08

0x0A

0x0C

0x0E

0x10

0x12

0x14

0x16

0x18

0x1A

0x1C to 0x1F

0x20

0x22

0x24

0x26

0x28

0x2A to 0x2F

0x30

0x32

0x34

0x36

0x38

0x3A

0x3C

0x3E

Size (Bytes)

2

2

2

2

2

2

2

2

2

2

2

2

2

2

4

2

2

2

2

2

6

2

2

2

2

2

2

2

2

Function

Diagnostics, flash write counter (16-bit binary)

Output, power supply

Output, x-axis acceleration

Output, y-axis acceleration

Output, auxiliary ADC

Output, temperature

Output, ±90° x-axis inclination

Output, ±90° y-axis inclination

Output, ±180° vertical rotational position

Calibration, x-axis acceleration offset null

Calibration, y-axis acceleration offset null

Calibration, x-axis inclination offset null

Calibration, y-axis inclination offset null

Calibration, vertical rotation offset null

Reserved, do not write to these locations

Alarm 1, amplitude threshold

Alarm 2, amplitude threshold

Alarm 1, sample period

Alarm 2, sample period

Alarm, source control register

Reserved

Auxiliary DAC data

Operation, digital I/O configuration and data

Operation, data-ready and self-test control

Operation, sample rate configuration

Operation, filter configuration

Operation, sleep mode control

Diagnostics, system status register

Operation, system command register

Reference

Table 7

Table 7

Table 7

Table 7

Table 7

Table 7

Table 7

Table 7

Table 16

Table 16

Table 17

Table 17

Table 17

Table 18

Table 18

Table 19

Table 19

Table 20

Table 14

Table 13

Table 12

Table 8

Table 10

Table 9

Table 21

Table 15

Rev. 0 | Page 11 of 16

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