PI6C9910
Zero-Delay Clock Buffer 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Unbalanced Output Drive AC Test Load and Waveform
5V
R1 R1 = 130Ω
R2 = 91Ω
CL = 30pF
CL
R2
(Includes fixture and
probe capacitance)
2.0V
Vth = 1.5V
0.8V
0.0V
≤1 ns
3.0V
2.0V
Vth = 1.5V
0.8V
≤1 ns
TTL AC Test Load
TTL Input Test Waveform
Table 1. Frequency Range Select
fNOM (MHz)
FS
Minimum Maximum
LOW
15
35
HIGH
25
80
AC Timing Diagram
REF
tPD
FB
tREF
tRPWH
tRPWL
tODCV tODCV
Q
tSKEW
tSKEW
tJR
OTHER Q
111
PS8341B 03/05/99