FX909AD2 データシートの表示（PDF） - CML Microsystems Plc

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FX909AD2

Wireless Modem Data Pump

CML Microsystems Plc 

Wireless Modem Data Pump

FX909A

NULL - No effect

This task is provided so that a AQBC or AQLEV command can be initiated without loading a new

task.

SFH - Search for Frame Head

Causes the modem to search the received signal for a Frame Head. The Frame Head will consist of

a 16-bit Frame Sync followed by control data (see Figure 6 - Mobitex Over Air Signal). The search

will continue until a Frame Head has been found, or until the RESET task is loaded.

The search is carried out by first attempting to match the incoming bits against the previously

programmed (task LFSB) 16-bit Frame Sync pattern (allowing up to any one bit (of 16) in error).

When a match has been found, the modem will read the next 3 received bytes as Frame Head bytes,

these bytes will be checked, and corrected if necessary, using the FEC bits. The two Frame Head

Data bytes are then placed into the Data Buffer.

The BFREE and IRQ bits of the Status Register will then be set to a logic '1' to indicate that the µC

may read the 2 Frame Head Data bytes from the Data Buffer and write the next task to the

Command Register. If the FEC indicates uncorrectable errors the modem will set the CRCFEC bit in

the Status Register to a logic '1'. The MOBAN bit (Mobile or Base) in the Status Register will be set

according to the polarity of the 3 bits preceding the Frame Sync pattern.

R3H - Read 3-byte Frame Head

This task, which would normally follow an SFS task, will place the next 3 bytes directly into the Data

Buffer. It also causes the modem to check the 3 bytes as Frame Head control data bytes and will set

the CRCFEC bit to a logic '1' (high) only if the FEC bits indicate uncorrectable errors. Note: This task

will not correct any errors and, due to the Mobitex FEC specification, will not detect all possible

uncorrectable error patterns The BFREE and IRQ bits of the Status Register will be set to '1' when

the task is complete to indicate that the µC may read the data from the Data Buffer and write the next

task to the modem's Command Register.

The CRCFEC bit in the Status Register will be set according to the validity of the received FEC bits.

RDB - Read Data Block

This task causes the modem to read the next 240 bits as a Mobitex Data Block.

It will de-scramble and de-interleave the bits, FEC correct and CRC check the resulting 18 data bytes

and place them into the Data Buffer, setting the BFREE and IRQ bits of the Status Register to '1'

when the task is complete to indicate that the µC may read the data from the Data Buffer and write

the next task to the modem's Command Register. The CRCFEC bit will be set according to the

outcome of the CRC check.

Note: in receive mode the CRC checksum circuits are initialised on completion of any task other than

NULL.

SFS - Search for Frame Sync

This task, which is intended for special test and channel monitoring purposes, performs the first part

only of a SFH task. It causes the modem to search the received signal for a 16-bit sequence which

matches the Frame Synchronisation pattern with up to any 1 bit in error.

When a match is found the modem will set the BFREE and IRQ bits of the Status Register to '1' and

update the MOBAN bit. The µC may then write the next task to the Command Register.

© 1996 Consumer Microcircuits Limited

17

D/909A/4

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