P4C116-35SC データシートの表示（PDF） - Performance Semiconductor
部品番号
コンポーネント説明
一致するリスト
P4C116-35SC Datasheet PDF : 8 Pages
| |||
P4C116
AC CHARACTERISTICS—WRITE CYCLE
(V
CC
=
5V
±
10%,
All
Temperature
Ranges)(2)
Sym.
Parameter
–10
–12
–15
–20
–25
–35
Unit
Min Max Min Max Min Max Min Max Min Max Min Max
tWC Write Cycle Time
10
12
15
20
25
35
ns
tCW Chip Enable Time to End of Write 8
10
12
15
18
25
ns
tAW Address Valid to End of Write
8
10
12
15
18
25
ns
tAS Address Set-up Time
0
0
0
0
0
0
ns
tWP Write Pulse Width
8
10
12
15
18
20
ns
tAH Address Hold Time
0
0
0
0
0
0
ns
tDW Data Valid to End of Write
7
8
10
12
15
20
ns
tDH Data Hold Time
0
0
0
0
0
0
ns
tWZ Write Enable to Output in High Z
6
7
8
10
15
15 ns
tOW Output Active from End of Write 0
0
0
0
0
0
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(10,11)
(13)
t WC
ADDRESS
CE
t CW
t AW
t WP
t WR
t AH
WE
DATA IN
(12)
DATA OUT
t AS
DATA UNDEFINED
t
(8)
WZ
t DW
DATA VALID
t DH
t
(8,12)
OW
HIGH IMPEDANCE
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(10)
(13)
t WC
ADDRESS
CE
WE
DATA IN
DATA OUT (11)
t AS
t CW
t AW
t WP
t AH
t WR
t DW
t DH
DATA VALID
HIGH IMPEDANCE
Notes:
10. CE and WE must be LOW for WRITE cycle.
11. OE is LOW for this WRITE cycle to show tWZ and tOW.
12. If CE goes HIGH simultaneously with WE HIGH, the output remains
in a high impedance state
13. Write Cycle Time is measured from the last valid address to the first
transitioning address.
51
Share Link: 