HEC4020BDB データシートの表示（PDF） - Philips Electronics
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HEC4020BDB Datasheet PDF : 6 Pages
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Philips Semiconductors
14-stage binary counter
Product specification
HEF4020B
MSI
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
600 fi + ∑ (fo CL) × VDD 2
where
10
2 800 fi + ∑ (fo CL) × VDD 2
fi = input freq. (MHz)
15
8 200 fi + ∑ (fo CL) × VDD 2
fo = output freq. (MHz)
CL = load cap. (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
Fig.4 Waveforms showing propagation delays for MR to On and CP to O0, minimum MR and CP pulse widths.
January 1995
5
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