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PM5945 データシートの表示(PDF) - PMC-Sierra

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PM5945 Datasheet PDF : 75 Pages
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S TANDARD PRODUCT
PMC-Sierra, Inc.
PM5945 SAPI
PMC-940106 ISSUE 3, May 16, 1994
SAPI DAUGHTERBOARD
______________________________________________________________________________________________
6
ACK
SYN
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6
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BEL
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CAN
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SUM
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DEL
P MC - P M5 9 4 5 - S A P I
50 4d 43 2d 50 4d 35 39 34 35 2d 53 41 50 49 20
DAUGHTERBOARD REGISTERS
The SAPI daughterboard has two write only register bits. One bit is a software reset bit
and the other is a transmit loopbacd enable bit.
Software Reset
The software reset bit is at binary address 1110xxxxx (the most significant bit is at
the far left and the least significant is at the far right). The least significant 5 bits of
the address are don't cares. Writing a binary xxxxxxx1 to this address will hold the
SUNI, the FIFO, and the PALs reset. Writing a binary xxxxxxx0 to this address will
remove the reset. The most significant 7 bits of data are don't cares. This is a write
only bit. A hardware reset removes the software reset.
Transmit Loopback Enable
The transmit loopback enable bit is at binary address 1111xxxxx (the most
significant bit is at the far left and the least significant is at the far right). The least
significant 5 bits of the address are don't cares. Writing a binary xxxxxxx1 to this
address will mux the transmit output data going to the optics, into the inputs of the
clock and data recovery PLL. This is all done inside the Cypress CY7B951 device.
______________________________________________________________________________________________
8

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