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M37640E8 データシートの表示(PDF) - MITSUBISHI ELECTRIC

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M37640E8 Datasheet PDF : 172 Pages
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Mitsubishi Microcomputer
7600 Series
M37640E8-XXXF Preliminary Specification
2.5 Processor Modes
The operation modes are described below. The memory maps for the first three modes are shown in
Figure 2-15.
Single chip mode is normally entered after reset. However, if the MCU has a CNVss pin, holding this
pin high will cause microprocessor mode to be entered after reset. After the reset sequence has
completed, the mode can be changed with software by modifying the value of bits 0 and 1 of CPMA.
However, while CNVss is high, bit 1 of CPMA is “1” and cannot be changed.
Single Chip Mode
0000
CPMA, CPMB,&
0007
Int Registers
0008
P0-P3
SFR
000F
0010
006F
0070
00FF
0100
046F
0470
Internal RAM
(Zero Page)
Internal RAM
Memory Expansion Mode
0000
CPMA, CPMB,&
0007
Int Registers
0008
External
SFR
000F
Memory
0010
006F
0070
00FF
0100
046F
0470
Internal RAM
(Zero Page)
Internal RAM
Microprocessor Mode
0000
CPMA, CPMB,&
0007
Int Registers
0008
External
SFR
000F
Memory
0010
006F
0070
00FF
0100
046F
0470
Internal RAM
(Zero Page)
Internal RAM
Inaccessible Area
External Memory
7FFF
8000
807F
8080
Reserved Area
ROM
FFC9
FFCA
FFFB
FFFC
FFFF
Interrupt
Vectors
Reserved Area
7FFF
8000
807F
8080
Reserved Area
External Memory
ROM
FFC9
FFCA
FFFB
FFFC
FFFF
Interrupt
Vectors
Reserved Area
FFFF
Figure 2-15. Operation Modes Memory Maps
2.5.1 Single Chip
In this mode, all ports take on their primary function and all internal memory is accessible. Those
areas that are not in internal memory are not accessible. Also, slow memory wait and EDMA are
disabled in this mode.
Processor Modes
7/9/98
2-17

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