AD7884ABP データシートの表示（PDF） - Analog Devices

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AD7884ABP

LC2MOS 16-Bit, High-Speed Sampling ADCs

Analog Devices 

AD7884/AD7885

USING THE AD7884/AD7885 ANALOG INPUT RANGES

The AD7884/AD7885 can be set up to have either a ± 3 volts

analog input range or a ± 5 volts analog input range. Figures 10

and 11 show the necessary corrections for each of these. The

output code is two’s complement and the ideal code table for

both input ranges is shown in Table I.

Table I. Ideal Output Code Table for the AD7884/AD7885

Analog Input

؎3 V

In Terms of FSR2 Range3

؎5 V

Range4

Digital Output

Code Transitionl

+FSR/2 – 1 LSB

+FSR/2 – 2 LSBs

+FSR/2 – 3 LSBs

2.999908

2.999817

2.999726

4.999847

4.999695

4.999543

011 . . . 111 to 111 . . . 110

011 . . . 110 to 011 . . . 101

011 . . . 101 to 011 . . . 100

AGND + 1 LSB

AGND

AGND – 1 LSB

0.000092 0.000153 000 . . . 001 to 000 . . . 000

0.000000 0.000000 000 . . . 000 to 111 . . . 111

–0.000092 –0.000153 111 . . . 111 to 111 . . . 110

–(FSR/2 – 3 LSBs) –2.999726 –4.999543 100 . . . 011 to 100 . . . 010

–(FSR/2 – 2 LSBs) –2.999817 –4.999695 100 . . . 010 to 100 . . . 001

–(FSR/2 – 1 LSB) –2.999908 –4.999847 100 . . . 001 to 100 . . . 000

NOTES

1This table applies for VREF+S = 3 V.

2FSR (Full-Scale Range) is 6 volts for the ± 3 V input range and 10 volts for the

± 5 V input range.

31 LSB on the ± 3 V range is FSR/216 and is equal to 91.5 µV.

41 LSB on the ± 5 V range is FSR/216 and is equal to 152.6 µV.

Reference Considerations

The AD7884/AD7885 operates from a ± 3 volt reference. This

can be derived simply using the AD780 as shown in Figure 6.

5VINS

A1

VINV

5VINF

3VINS

3VINF

Figure 10. ±5 V Input Range Connection

5VINS

5VINF

3VINS

A1

VINV

3VINF

Figure 11. ±3 V Input Range Connections

The critical performance specification for a reference in a 16-bit

application is noise. The reference pk-pk noise should be insig-

nificant in comparison to the ADC noise. The AD7884/AD7885

has a typical rms noise of 120 µV. For example a reasonable

target would be to keep the total rms noise less than 125 µV.

To do this the reference noise needs to be less than 35 µV rms.

In the 100 kHz band, the AD780 noise is less than 30 µV rms,

making it a very suitable reference.

The buffer amplifier used to drive the device VREF+ should have

low enough noise performance so as not to affect the overall

system noise requirement. The AD845 and AD817 achieve this.

Decoupling and Grounding

The AD7884 and AD7885A have one AVDD pin and two VDD

pins. They also have one AVSS pin and three VSS pins. The

AD7885 has one AVDD pin, one VDD pin, one AVSS pin and

one VSS pin. Figure 6 shows how a common +5 V supply should

be used for the positive supply pins and a common –5 V supply

for the negative supply pins.

For decoupling purposes, the critical pins on both devices are

the AVDD and AVSS pins. Each of these should be decoupled to

system AGND with 10 µF tantalum and 0.1 µF ceramic capaci-

tors right at the pins. With the VDD and VSS pins, it is sufficient

to decouple each of these with ceramic 1 µF capacitors.

AGNDS, AGNDF are the ground return points for the on-chip

9-bit ADC. They should be driven by a buffer amplifier as shown

in Figure 6. If they are tied directly together and then to ground,

there will be a marginal degradation in linearity performance.

The GND pin is the analog ground return for the on-chip lin-

ear circuitry. It should be connected to system analog ground.

The DGND pin is the ground return for the on-chip digital

circuitry. It should be connected to the ground terminal of the

VDD and VSS supplies. If a common analog supply is used for

AVDD and VDD then DGND should be connected to the com-

mon ground point.

Power Supply Sequencing

AVDD and VDD are connected to a common substrate and there

is typically 17 Ω resistance between them. If they are powered

by separate 5 V supplies, then these should come up simulta-

neously. Otherwise, the one that comes up first will have to

drive 5 V into a 17 Ω load for a short period of time. However,

the standard short-circuit protection on regulators like the 7800

series will ensure that there is no possibility of damage to the

driving device.

AVSS should always come up either before or at the same

time as VSS. If this cannot be guaranteed, Schottky diodes

should be used to ensure that VSS never exceeds AVSS by

more than 0.3 V. Arranging the power supplies as in Figure

6 and using the recommended decoupling ensures that there

are no power supply sequencing issues as well as giving the

specified noise performance.

+5V

+5V

–5V

–5V

HP5082-2810

OR

EQUIVALENT

AVDD VDD

AVSS

VSS

AD7884/AD7885

Figure 12. Schottky Diodes Used to Protect Against

Incorrect Power Supply Sequencing

–10–

REV. D

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