CXA2069Q データシートの表示（PDF） - Sony Semiconductor
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CXA2069Q Datasheet PDF : 19 Pages
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CXA2069Q
Pin
Pin
Symbol
No.
voltage
36 DC_OUT —
55 TRAP1
3.8 V
46 TRAP2
Equivalent circuit
VCC
4k
36
28k
1k
Q1
VCC
100
55
46
1k
Description
Outputs the S2-compatible DC
superimposed onto the COUT3 output.
The DC is superimposed by connecting
this pin to the COUT3 output via a
capacitor.
Control is performed by the I2C bus.
When 0 V is output, Q1 is ON and the
impedance is 5 kΩ.
S2 protocol output impedance of
10 ±3 kΩ is realized by attaching
external resistance of 4.7 kΩ.
DC_OUT (bus)
Output DC
0
4.5 V
1
0V
2
1.9 V
3
4.5 V
Connects trap circuit for subcarrier.
48 MUTE
—
VCC
147 72k
48
28k
Audio signal output mute.
Mute OFF at 1.5 V or less
Mute ON at 2.5 V or more
Mute OFF when open.
50
BIAS 4.5 V
VCC VCC
VCC
20k
147
50
20k
Internal reference bias (VCC/2).
Connect to GND via a capacitor.
—7—
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