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CXA2079Q データシートの表示(PDF) - Sony Semiconductor

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CXA2079Q Datasheet PDF : 20 Pages
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CXA2079Q
2) Control Registers
The CXA2079Q control is exercised by writing 2-byte data into the two 8-bit control registers which control the
output selector circuits for the 2 outputs.
S Slave address A
DATA1
A
DATA2
AP
S: Start condition
A: Acknowledge
P: Stop condition
Control register structure (DATA1 and DATA2)
All registers are set to "0" during IC power on.
"" indicates undefined.
b7
b6
b5
b4
b3
Slave add.
1
0
0
1
0
DATA1 A-GAIN S/COMP1
V-IN1
DATA2
S/COMP2
AV-IN2
R/W (1): Read/write mode
0: Control data write
1: Status register read
b2
b1
b0
0
ADR
R/W
A-IN1
DC OUT
ADR (1): This bit sets the slave address set by the address pin.
0: 90H
1: 92H
A-GAIN (1): LOUT1/ROUT1 output gain selector
0: 0dB output
1: –6dB output
S/COMP1 and S/COMP2 (1 each): S terminal input/composite signal input selectors
By setting these bits to "0", when composite signal input is selected, YOUT/COUT output the inputs
from YIN/CIN during video 1/2 output.
0: Composite signal inputs (TV, V1 to V5 inputs)
1: S terminal inputs (Y1/C1 to Y4/C4 inputs)
V-IN1 (3 each): This bit selects the input signals output to each video output.
0: Mute
1: Selects the TV input
2: Selects the V1 and Y1/C1 inputs
3: Selects the V2 and Y2/C2 inputs
4: Selects the V3 and Y3/C3 inputs
5: Selects the V4 and Y4/C4 inputs
6: Selects the V5 input
7: Mute
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