RF25A データシートの表示（PDF） - Conexant Systems

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RF25A

RF25A for CDMA, and AMPS Applications

Conexant Systems 

Rx ASIC

Technical Description

Low Noise Amplifier (LNA). The LNA is designed with a high

gain, low noise figure, and high 3rd order input intercept (IIP3)

performance. These parameters can be optimized with the

mixer gain, noise figure, and IIP3 to achieve the cascade NF

and IIP3 system requirements. RF25A pin 2 is LNA decoupled,

requiring a RF bypass capacitor to ground with minimal trace

length. Input and output matching networks are external to the

Rx ASIC.

Mixers. The active double balanced mixer is designed for high

gain, a low noise figure, and high IIP3 performance. The mixer

can also be optimized for RF performance to complement the

LNA RF performance, and satisfy overall Rx NF and IIP3 system

requirements. The LO port operates with a typical LO drive level

of -10 dBm. The mixer has a balanced output to drive the IF

SAW filter in CDMA mode, and single-ended output to drive the

IF SAW filter in the AMPS mode.

Variable Gain Amplifier (VGA). The high dynamic range

required by a CDMA handset is achieved by the VGA, which has

a minimum dynamic range of 90 dB and a control voltage range

from 0.5 to 2.5 V. The VGA is common in both modes (CDMA

and AMPS) by switching its internal input buffers.

I/Q Demodulator. The I/Q Demodulator is designed for mobile

handset application. It has an on-chip generated VHF LO with a

typical operating range of 100 to 600 MHz and a typical I/Q

output operating range of 0 to 5 MHz. The I/Q Demodulator is

internally connected to the VGA output, and is fully differential to

reduce common mode noise. DC offsets between differential I/Q

outputs, and between I and Q channels, are extremely low to

facilitate compatibility with baseband interfaces. The

I/Q Demodulator is also designed to have very low amplitude

and phase imbalance.

VHF Oscillator. With external tank circuits, the VCO provides

the LO signal to drive the demodulator, and the prescaler of an

external Phase Locked Loop (PLL). The oscillator can operate

at two or four times at twice the IF frequency. Using a selectable

divide ratio, the LO for the I/Q demodulator is derived. The logic

signal to select the divider ratio (2 or 4) is available on Pin 13

(DIV2/DIV4).

Mode Control. The operation of the chip is controlled by signals

at Pin 7 (FM/CDMA), Pin 20 (SLEEP), and Pin 13 (DIV2/DIV4).

All the switching is done internally. The supply voltage should be

present at all the VCC pins for normal operation. The modes

selected are shown in Table 4.

RF25A

Electrical and Mechanical Specifications

Included in this document are Tables 1 through 5 and Figures 1

through 4, which define and illustrate the electrical and

mechanical specifications of the RF25A.

Table 1:

RF25A Pin Assignments and Signal

Descriptions

Table 2:

Absolute Maximum Ratings

Table 3:

Recommended Operating Conditions

Table 4:

Mode Control Select Signal Switching

Table 5:

RF25A RX ASIC Electrical Specifications

Figure 1:

RF25A Rx ASIC Pin-out - 40-Pin LGA

6 x 6 mm Package

Figure 2:

RF25A Rx ASIC Block Diagram

Figure 3 – 19: Typical Functional Block Performance

Figure 20: RF25A Schematic Diagram

Figure 21:

RF25A Package Dimensions – 40-Pin LGA

6 x 6 mm Package

Figure 22: 40-Pin LGA Tape and Reel Dimensions

ESD Sensitivity

The RF25A is a Class 1 device. The following extreme

Electrostatic Discharge (ESD) precautions are required

according to the Human Body Model (HBM):

• Protective outer garments.

• Handle device in ESD safeguarded work area.

• Transport device in ESD shielded containers.

• Monitor and test all ESD protection equipment.

The HBM ESD withstand threshold value, with respect to

ground, is ±1.5 kV. The HBM ESD withstand threshold value,

with respect to VDD (the positive power supply terminal) is also

±1.5 kV.

101110A

Conexant – Preliminary

3

August 4, 2000

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