MU9C1965L-12TCC データシートの表示（PDF） - Music Semiconductors

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MU9C1965L-12TCC

LANCAM® MP

Music Semiconductors 

MU9C1965A/L LANCAM® MP

PIN DESCRIPTIONS

All signals are implemented in CMOS technology with TTL levels. Signal names that start with a slash (“/”) are active LOW. Inputs

should never be left floating. The CAM architecture draws large currents during compare operations, mandating the use of good layout

and bypassing techniques. Refer to the Electrical Characteristics section for more information.

/E (Chip Enable, Input, TTL)

The /E input enables the device while LOW. The falling

edge registers the control signals /W, /CM, /EC. The rising

edge locks the daisy chain, turns off the DQ pins, and clocks

the Destination and Source Segment counters. The four

cycle types enabled by /E are shown in Table 2.

DQ31–0 (Data Bus, I/O, TTL)

The DQ31–0 lines convey data, commands, and status to

and from the LANCAM MP, as shown in Table 3. /W and

/CM control the direction and nature of the information

that flows to or from the device. When /E is HIGH,

DQ31–0 go to Hi-Z.

/W

LOW

LOW

HIGH

HIGH

/CM

Cycle Type

LOW

Command Write Cycle

HIGH

Data Write Cycle

LOW

Command Read Cycle

HIGH

Data Read Cycle

Table 2: I/O Cycles

/W (Write Enable, Input, TTL)

The /W input selects the direction of data flow during a

device cycle. /W LOW selects a Write cycle and /W HIGH

selects a Read cycle.

/CM (Data/Command Select, Input, TTL)

The /CM input selects whether the input signals on

DQ31–0 are data or commands. /CM LOW selects Command

cycles and /CM HIGH selects Data cycles.

/MF (Match Flag, Output, TTL)

The /MF output goes LOW when one or more valid matches

occur during a Compare cycle. /MF becomes valid after /E

goes HIGH on the cycle that enables the daisy chain (on

the first cycle that /EC is registered LOW by the previous

falling edge of /E; see Figure 5 on page 15). In a daisy

chain, valid match(es) in higher priority devices are passed

from the /MI input to /MF. If the daisy chain is enabled but

the match flag is disabled in the Control register, the /MF

output only depends on the /MI input of the device (/MF=

/MI). /MF is HIGH if there is no match or when the daisy

chain is disabled (/E goes HIGH when /EC was HIGH on the

previous falling edge of /E). The System Match flag is the

/MF pin of the last device in the daisy chain. /MF will be

reset when the active configuration register set is changed.

/EC (Enable Daisy Chain, Input, TTL)

The /EC signal performs two functions. The /EC input

enables the /MF output to show the results of a comparison, GND 61

G ND

62

as shown in Figure 5 on page 15. If /EC is LOW at the DQ9 63

falling edge of /E in a given cycle, the /MF output is enabled.

D Q 10

D Q 11

64

65

Otherwise, the /MF output is held HIGH. The /EC signal

NC

66

V CC

67

also enables the /MF–/MI daisy chain, which serves to VCC 68

select the device with the Highest-Priority Match in a string

TEST 2

NC

69

70

of LANCAMs. Tables 6a and 6b on page 12 explain the GND 71

effect of the /EC signal on a device with or without a match

G ND

D Q 12

72

73

in both Standard and Enhanced modes. /EC must be HIGH DQ13 74

G ND

75

during initialization.

G ND

76

D Q 14

77

D Q 15

78

D Q 16

79

NC

80

80-Pin TQFP

(Top View)

40

NC

39

/ FF

38

/MI

37

/MF

36

/MM

35

G ND

34

G ND

33

/RESET

32

V CC

31

V CC

30

/E

29

/W

28

V CC

27

V CC

26

TEST 1

25

NC

24

D Q 31

23

D Q 30

22

G ND

21

G ND

Pinout Diagram

3

Rev. 1a

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