SL74HCT08D データシートの表示（PDF） - System Logic Semiconductor

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SL74HCT08D

Quad 2-Input AND Gate High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HCT08

AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)

Guaranteed Limits

Symbol

Parameter

25 °C to

-55°C

≤85°C

≤125°C

Unit

tPLH, tPHL Maximum Propagation Delay, Input A

19

or B to Output Y

(Figures 1 and 2)

24

28

ns

tTLH, tTHL Maximum Output Transition Time,

15

Any Output (Figures 1 and 2)

19

22

ns

CIN

Maximum Input Capacitance

10

10

10

pF

Power Dissipation Capacitance (Per

Gate)

CPD Used to determine the no-load

dynamic power consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

20

pF

Figure 1. Switching Waveforms.

Figure 2. Test Circuit

EXPANDED LOGIC DIAGRAM

(1/4 of the Device)

SLS

System Logic

Semiconductor

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