74LV377 データシートの表示（PDF） - Philips Electronics
部品番号
コンポーネント説明
一致するリスト
74LV377 Datasheet PDF : 12 Pages
| |||
Philips Semiconductors
Octal D-type flip-flop with data enable;
positive edge-trigger
Product specification
74LV377
FEATURES
• Optimized for Low Voltage applications: 1.0 to 3.6V
• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V,
Tamb = 25°C
• Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V,
Tamb = 25°C
• Ideal for addressable register applications
• Data enable for address and data synchronization applications
• Eight positive-edge triggered D-type flip-flops
• Output capability: standard
• ICC category: MSI
DESCRIPTION
The 74LV377 is a low–voltage CMOS device and is pin and function
compatible with 74HC/HCT377.
The 74LV377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable (E) is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Qn) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
fmax
Propagation delay
CP to Qn
Maximum clock frequency
CL = 15pF
VCC = 3.3V
CI
Input capacitance
CPD
Power dissipation capacitance per flip-flop Notes 1 and 2
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD VCC2 fi )S (CL VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL VCC2 fo) = sum of the outputs.
2. The condition is VI = GND to VCC
TYPICAL
13
77
3.5
20
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIL
20-Pin Plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
OUTSIDE NORTH AMERICA
74LV377 N
74LV377 D
74LV377 DB
74LV377 PW
NORTH AMERICA
74LV377 N
74LV377 D
74LV377 DB
74LV377PW DH
UNIT
ns
MHz
pF
pF
PKG. DWG. #
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
1
E
2, 5, 6, 9, 12,
15, 16, 19
Q0 to Q7
3, 4, 7, 8, 13,
14, 17, 18
D0 to D7
10
GND
11
CP
20
VCC
FUNCTION
Data enable input (active-LOW)
flip-flop outputs
Data inputs
Ground (0V)
Clock input
(LOW-to-HIGH, edge-triggered)
Positive supply voltage
FUNCTION TABLE
OPERATING MODES
Load ‘‘1’’
INPUTS
CP
E
Dn
↑
l
h
OUTPUTS
Qn
H
Load ‘‘0’’
↑
l
l
L
Hold (do nothing)
↑
h
X
No change
X
H
X
No change
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L = LOW voltage level
l
= LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
↑ = LOW–to–HIGH CP transition
X = Don’t care
1998 Jun 10
2
853–1935 19545
Share Link: 