MT8960 データシートの表示（PDF） - Zarlink Semiconductor Inc

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MT8960

Integrated PCM Filter Codec

Zarlink Semiconductor Inc 

MT8960/61/62/63/64/65/66/67

Data Sheet

Mode

1

(Note 1)

2

3

(Note 2)

Note 1:

Note 2:

CA

CSTi

Function

VEE

GNDD Normal chip operation.

VDD

Powerdown.

VEE

Serial Eight-bit control word into Register A. Register B is reset.

Data

GNDD

Serial Eight-bit control word into register A. Register B is unaffected.

Data

VDD

Serial Eight-bit control word into register A. Register B is unaffected.

Data

When operating in Mode 1, there should be only one frame pulse (F1i) per 125 µs frame

When operating in Mode 3, PCM input and output is inhibited by CA=VDD.

Table 1 - Digital Control Modes

BIT 2

0

0

0

0

1

1

1

1

BIT 5

0

0

0

0

1

1

1

1

BIT 1

0

0

1

1

0

0

1

1

BIT 4

0

0

1

1

0

0

1

1

BIT 0

0

1

0

1

0

1

0

1

BIT 3

0

1

0

1

0

1

0

1

TRANSMIT (A/D)

FILTER GAIN (dB)

0

+1

+2

+3

+4

+5

+6

+7

RECEIVE (D/A)

FILTER GAIN (dB)

0

-1

-2

-3

-4

-5

-6

-7

8

Zarlink Semiconductor Inc.

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