OKI Semiconductor
FEDL7029-03
ML7029
APPLICATION INFORMATION
Burst Mode Clock
This device can be operated by a burst mode clock (see below).
BCLK
1 2 3 4 5 67 8
SYNC
1/fsample µs
SYNC Signal Pulse Width
: MIN. 1-bit clock
: MAX. (Number of clocks in burst mode)–1
Figure 5 Example of Burst Mode Clock
Relationship between SYNC and BLCK
Transmit Side
SYNC
1/fsample µs
BCLK
PCMSI
1 234 5 67 8
Ts
(1)
Receive Side
SYNC
0.83/fsample µs
PCM Data Input
1µs (Range of Data Slip Occurrence)
A
Figure 6
1/fsample µs
BCLK
1 234 5 67 8
Tr
IR
(2)
ADPCM Data Input
0.52/fsample µs
1 µs (Range of Data Slip Occurrence)
B
Figure 7
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