CXK5T8257BTM/BYM/BM
• Write cycle (2): CE control
Address
OE
CE
WE
Data in
tWC
tAW
tAS
tCW
tWR1
tWP
tDW
tDH
Data valid
Data out
High impedance
∗1 Write is executed when both CE and WE are at low simultaneously.
∗2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is output condition.
–7–