CXB1451Q データシートの表示（PDF） - Sony Semiconductor
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CXB1451Q Datasheet PDF : 13 Pages
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CXB1451Q
VCCA/G/E/T
A
A
61
52
VCC
CXB1451Q
55
53
VEEA/G/E/T
Fig. 2. IOH_SD and IOL_SD DC measurement
Tab. 4. AC Characteristics (Under the recommended conditons. See Tab. 5)
Description
Input TTL rise time
Input TTL fall time
Symbol
Tir
Tir
SFTCLK frequency
Fsftclk
SFTCLK duty factor
Dsftclk
Pixel/Sync/Cntl setup to SFTCLK Tsetup
Pixel/Sync/Cntl hold to SFTCLK Thold
SDATA rise time
Tor
SDATA fall time
Tof
CLOCK mode assert time
TAclk
CLOCK mode deassert time TDclk
IDLE mode assert time
TAidle
IDLE mode deassert time
TDidle
PLL lockin time
Tlockin
Min.
0.7
0.7
20.0
10.0
38.0
19.0
60.0
30.0
40
4.0
1.0
Typ.
25.0
12.5
40.0
20.0
65.0
32.5
130
10
150
350
0.1
Max.
4.8
4.8
28.0
14.0
48.0
24.0
68.0
34.0
60
400
400
Unit
Conditions
ns 0.8V to 2.0V
ns 2.0V to 0.8V
MHz
MHz
MHz
MHz
MHz
MHz
VGA, 1 pixel/sftclk mode
VGA, 2 pixel/sftclk mode
SVGA, 1 pixel/sftclk mode
SVGA, 2 pixel/sftclk mode
XGA, 1 pixel/sftclk mode
XGA, 2 pixel/sftclk mode
% Vth = 1.4V
ns XGA 1 pixel/sftclk mode
ns @65MHz
See Fig. 4
ps 20 to 80%, CL = 2pF
ps
See Fig. 3
ns
ns
ns
ns
ms
TTL clock
VCC
72
VCCA/G/E/T
CXB1451Q
VEEA/G/E/T
51
52
53
51
100
FET probe
Sampling
oscillo-
scope
Fig. 3. SDATA waveform measurement
–5–
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