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74LV125 データシート - NXP Semiconductors.

部品番号コンポーネント説明メーカー
74LV125 Quad buffer/line driver; 3-state NXP
NXP Semiconductors. NXP
その他の PDF  利用不可。
74LV125 データシート PDF : 74LV125 pdf   
74LV125D,118 image

General description
The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125.

Features
■ Wide operating voltage: 1.0 V to 5.5 V
■ Optimized for low voltage applications: 1.0 V to 3.6 V
■ Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
■ Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
■ Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
    Tamb = 25 °C
■ ESD protection:
    ◆ HBM JESD22-A114E exceeds 2000 V
    ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
   

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